• DocumentCode
    803809
  • Title

    A new carry-free division algorithm and its application to a single-chip 1024-b RSA processor

  • Author

    Vandemeulebroecke, André ; Vanzieleghem, Etienne ; Denayer, Tony ; Jespers, Paul G A

  • Author_Institution
    Microelectron. Lab., Univ. Catholique de Louvain, Belgium
  • Volume
    25
  • Issue
    3
  • fYear
    1990
  • fDate
    6/1/1990 12:00:00 AM
  • Firstpage
    748
  • Lastpage
    756
  • Abstract
    A carry-free division algorithm is described. It is based on the properties of redundant signed digit (RSD) arithmetic to avoid carry propagation and uses the minimum hardware per bit, i.e. one full adder. Its application to a 1024-b RSA (Rivest, Shamir, and Adelman) cryptographic chip is presented. The features of this new algorithm allowed high performance (8 kb/s for 1024-b words) to be obtained for relatively small area and power consumption (80 mm2 in a 2-μm CMOS process and 500 mW at 25 MHz)
  • Keywords
    CMOS integrated circuits; adders; cryptography; dividing circuits; 2 micron; 25 MHz; 500 mW; CMOS process; RSA processor; area; carry-free division algorithm; cryptographic chip; full adder; power consumption; redundant signed digit; Adders; Arithmetic; CMOS process; Data security; Energy consumption; Hardware; Laboratories; Microelectronics; Power system protection; Public key cryptography;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.102670
  • Filename
    102670
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=803809