A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS

Author

Hui Pan ; Yuan Yao ; Hammad, Mostafa ; Junhua Tan ; Abdelhalim, Karim ; Wang, Evelyn Wenting ; Hsu, Rick C. J. ; Tam, Derek ; Fujimori, Ichiro

Author_Institution

Broadcom Corp., Irvine, CA, USA

Volume

49

Issue

12

fYear

2014

fDate

Dec. 2014

Firstpage

3141

Lastpage

3155

Abstract

This paper details a duplex architecture coupled with a linear Class-AB push-pull output stage that maximizes the power efficiency of linear wideband drivers for high-speed transceivers. The duplex driver merges transmission, reception, and termination; eliminates hybrid and termination overhead; and enables adaptive echo cancellation and rail-to-rail full-duplex operation. Implemented in 28 nm CMOS, this GPHY driver passes the 1000BASE-T and 100BASE-TX compliance tests using a 2.5 V supply and meets the transmit specifications for the half-duplex 10BASE-T Ethernet using a 3.3 V supply.

Keywords

CMOS integrated circuits; conformance testing; driver circuits; echo suppression; local area networks; radio transceivers; 1000BASE-T compliance tests; 100BASE-TX compliance tests; CMOS integrated circuit; GPHY driver; adaptive echo cancellation; duplex architecture; full-duplex line driver; gigabit Ethernet; half-duplex 10BASE-T Ethernet; high-speed transceivers; linear class-AB push-pull output stage; linear wideband drivers; rail-to-rail class-AB output stage; size 28 nm; voltage 2.5 V; voltage 3.3 V; CMOS integrated circuits; Echo cancellers; Impedance; Noise; Transceivers; Voltage control; Wideband; CM compensation; Class-AB; driver; duplex; gigabit ethernet; hybrid; push-pull; rail-to-rail; self-termination; transceiver;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2014.2353796

Filename

6906304