A high slew-rate CMOS amplifier for analog signal processing

Author

Lee, Bang W. ; Sheu, Bing J.

Author_Institution

Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA

Volume

25

Issue

3

fYear

1990

fDate

6/1/1990 12:00:00 AM

Firstpage

885

Lastpage

889

Abstract

The performances of several types of analog VLSI circuits are limited by the setting behavior of CMOS amplifiers. An amplifier with a nonsaturated input stage which achieves a high slew-rate response is presented. The impact of this slew-rate amplifier on switched-capacitor circuits is described. Prototyping amplifier circuits were fabricated by the MOSIS service using a 2-μm scalable CMOS technology. When biased at a DC power dissipation of 1 mW, the two-stage amplifier achieves a slew rate of 80 V/μs, a positive-supply rejection ratio of 73 dB, and a negative-supply rejection ratio of 57 dB and 50 kHz

Keywords

CMOS integrated circuits; DC amplifiers; VLSI; linear integrated circuits; operational amplifiers; switched capacitor networks; 1 mW; 2 micron; CMOS amplifier; DC power dissipation; MOSIS service; VLSI; analog signal processing; negative-supply rejection ratio; nonsaturated input stage; positive-supply rejection ratio; scalable CMOS technology; setting behavior; slew-rate; switched-capacitor circuits; two-stage amplifier; CMOS process; CMOS technology; Differential amplifiers; Dynamic range; Image processing; Power amplifiers; Signal processing; Switching circuits; Very large scale integration; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.102692

Filename

102692