On mapping a tracking algorithm onto parallel processors

Author

Pattipati, Krishna R. ; Kurien, Thomas ; Lee, Rong-Tay ; Luh, Peter B.

Author_Institution

Dept. of Electr. & Syst. Eng., Connecticut Univ., Storrs, CT, USA

Volume

26

Issue

5

fYear

1990

fDate

9/1/1990 12:00:00 AM

Firstpage

774

Lastpage

791

Abstract

The problem of mapping the tasks of a multitarget tracking algorithm onto parallel computing architectures to maximize speedup is considered. An asymptotically optimal mapping algorithm is developed and applied to study the effects of task granularity and processor architectures on the speedup. From the simulation results, it is concluded that task granularity and the parallelization of clustering and global hypotheses formation stages of the tracking algorithm are major determinants of speedup

Keywords

parallel algorithms; parallel architectures; tracking systems; asymptotically optimal mapping algorithm; global hypotheses; multitarget tracking; parallel computing architectures; parallel processors; parallelization of clustering; processor architectures; simulation; task granularity; tracking algorithm; Algorithm design and analysis; Clustering algorithms; Computational modeling; Computer architecture; Concurrent computing; Logic; Missiles; Parallel processing; Partitioning algorithms; Target tracking;

fLanguage

English

Journal_Title

Aerospace and Electronic Systems, IEEE Transactions on

Publisher

ieee

ISSN

0018-9251

Type

jour

DOI

10.1109/7.102713

Filename

102713