• DocumentCode
    80468
  • Title

    Analysis and Optimization of Transformer-Based Power Combining for Back-Off Efficiency Enhancement

  • Author

    Kaymaksut, Ercan ; Francois, B. ; Reynaert, Patrick

  • Author_Institution
    Microelectronics and Sensors division (MICAS), Dept. of Electrical Engineering (ESAT), Katholieke Universiteit Leuven, Leuven, Belgium
  • Volume
    60
  • Issue
    4
  • fYear
    2013
  • fDate
    Apr-13
  • Firstpage
    825
  • Lastpage
    835
  • Abstract
    This paper analyzes the back-off efficiency enhancement characteristics of transformer combined power amplifiers taking into account the amplifier and transformer parasitics. The dynamic power combining properties of different transformer architectures are investigated. The co-optimization of the transformer and the amplifiers is presented for the transformer-based Doherty power amplifier which is a linear class of operation with back-off efficiency enhancement. Then this analysis is extended for the uneven Doherty power amplifier which employs asymmetrical transformers. The proposed design methodology is used to design a 2.4 GHz uneven Doherty power amplifier in standard 90 nm CMOS technology. The fabricated two stage Doherty amplifier achieves 26.2 dBm peak output power at 2 V supply. The measured peak drain efficiency of the PA is 37% while the efficiency at 6 dB back-off is still as high as 30.1%.
  • Keywords
    Capacitance; Impedance; Inductors; Q factor; Resistance; Tuning; Windings; Back-off efficiency; CMOS technology; Doherty power amplifier; series combining transformer;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2012.2221223
  • Filename
    6365282