DocumentCode
805406
Title
A framework for solving logical topology design problems within constrained computation time
Author
Zalesky, Andrew ; Vu, Hai Le ; Zukerman, Moshe ; Ouveysi, Iradj
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Melbourne, Vic., Australia
Volume
7
Issue
10
fYear
2003
Firstpage
499
Lastpage
501
Abstract
We present a framework for solving logical topology design (LTD) problems in a constrained amount of computation time. Our framework uses a search space dimensionality (SSD) reduction technique that exploits a tradeoff between computation time and solution quality. We have demonstrated that our framework offers improved solution quality in comparison to an existing SSD reduction technique reported in the literature.
Keywords
integer programming; linear programming; network topology; optical fibre networks; search problems; telecommunication network routing; telecommunication traffic; LTD problems; SSD reduction; constrained computation time; logical topology design problems; mixed integer linear programming; optical networks; routing; search space dimensionality reduction; solution quality; Circuit topology; Design optimization; Mixed integer linear programming; Network topology; Optical coupling; Optical design; Optical fiber networks; Optical interconnections; Time factors; Wavelength routing;
fLanguage
English
Journal_Title
Communications Letters, IEEE
Publisher
ieee
ISSN
1089-7798
Type
jour
DOI
10.1109/LCOMM.2003.818883
Filename
1237349
Link To Document