Title :
Efficient and Accurate Schematic Transistor Model of FinFET Parasitic Elements
Author :
Ning Lu ; Hook, T.B. ; Johnson, J.B. ; Wermer, Carl ; Putnam, Cynthia ; Wachnik, Richard A.
Author_Institution :
Semicond. R&D Center, Syst. & Technol. Group, IBM, Essex Junction, VT, USA
Abstract :
We present a schematic transistor model for multifinger multifin FETs, which greatly simplifies an initially complex network. The schematic finFET model accepts various finFET layout information and is accurate in predicting the overall finFET characteristics, including the effect of parasitic resistance (R) and capacitance (C) in a finFET.
Keywords :
MOSFET; finFET parasitic elements; multifinger multifin FET; schematic transistor model; Equations; Field effect transistors; Logic gates; Mathematical model; Resistance; SPICE; FinFET/trigate/double-gate; parasitic resistance; schematic FET model; source/drain (S/D) and gate resistance;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2013.2274511
