DocumentCode
805526
Title
Fast functional simulation: an incremental approach
Author
Hwang, Sun Young ; Blank, Tom ; Choi, Kiyoung
Author_Institution
Dept. of Electr. Eng., Stanford Univ., CA, USA
Volume
7
Issue
7
fYear
1988
fDate
7/1/1988 12:00:00 AM
Firstpage
765
Lastpage
774
Abstract
In an effort to speed up simulation, a novel algorithm,, called incremental simulation evaluates the circuit components that can be affected directly or indirectly by design changes, utilizing the information generated during the previous simulation to reduce the number of component evaluations to a minimum. The authors describe the design and implementation of the incremental algorithm for logic or functional simulation, which substantially improves the run-time performance over existing simulators by using the incremental property of the hardware design process
Keywords
circuit CAD; circuit analysis computing; logic CAD; CAD; circuit components; computer aided design; design changes; functional simulation; incremental algorithm; incremental simulation; logic simulation; run-time performance; Algorithm design and analysis; Circuit simulation; Circuit testing; Computational modeling; Design methodology; Hardware; Logic design; Process design; Synthesizers; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.3947
Filename
3947
Link To Document