Analysis and synthesis of combinational pass transistor circuits

A method for analyzing a wide range of CMOS pass transistor circuits is presented. Based on concepts derived from analysis, synthesis algorithms are proposed. They have been implemented as a program called PAVOS which can solve relatively complex problems. A manual method is presented for handling simpler ones. An effective minimization of the circuit area is obtained by using incomplete transmission gates, i.e. gates composed of either PMOS or NMOS transistors, without degrading the circuit output signals. The specification or a circuit can contain high-impedance states and attractive don´t-cares called don´t-happen states. It is shown that well-known good-pass transistor circuits, which synthesize results from designers´ experience and intuition, can easily be obtained with the described methods. It is suggested that synthesis algorithms for all kinds of logics can be obtained by making small modifications on PAVOS