DocumentCode
805756
Title
Computer simulation of IGBT losses in PFC circuits
Author
Stuart, T.A.
Author_Institution
Toledo Univ., OH
Volume
31
Issue
3
fYear
1995
fDate
7/1/1995 12:00:00 AM
Firstpage
1167
Lastpage
1173
Abstract
An analysis is presented that forms the basis for an algorithm for calculating the IGBT losses in a power factor correction (PFC) circuit. The method employs experimental data from an off-line test circuit that closely resembles the switching conditions in the actual PFC. This technique provides calculated values of both the conduction and switching losses of the main transistor in a boost-type PFC circuit. Results for a 6 kW PFC are included
Keywords
digital simulation; insulated gate bipolar transistors; losses; power engineering computing; power factor correction; power semiconductor switches; 6 kW; IGBT losses; PFC circuits; boost-type PFC circuit; conduction; off-line test circuit; power factor correction; switching conditions; switching losses; transistor; Circuit analysis; Circuit simulation; Circuit testing; Computer simulation; Current measurement; Insulated gate bipolar transistors; Loss measurement; Power factor correction; Switches; Switching loss;
fLanguage
English
Journal_Title
Aerospace and Electronic Systems, IEEE Transactions on
Publisher
ieee
ISSN
0018-9251
Type
jour
DOI
10.1109/7.395223
Filename
395223
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