• DocumentCode
    808314
  • Title

    Effect of laminated wafer toward dicing process and alternative double pass sawing method to reduce chipping

  • Author

    Jiun, Hoh Huey ; Ahmad, Ibrahim ; Jalar, Azman ; Omar, Ghazali

  • Author_Institution
    Dept. of Electr., Univ. of Kebangsaan Malaysia, Selangor, Malaysia
  • Volume
    29
  • Issue
    1
  • fYear
    2006
  • Firstpage
    17
  • Lastpage
    24
  • Abstract
    Thin wafers of 100-μm thickness laminated with die-attach film (DAF) was diced using a standard sawing process and revealed a low chipping crack resistance. Wafers laminated with conductive DAF shows greater chipping compared to nonconductive DAF and bare silicon wafer. It was found through scanning electron microscopy (SEM) micrographs, energy dispersive X-ray (EDX) analysis, and atomic force microscopy (AFM) that silver fillers in the conductive DAF was the cause of excessive blade loading which resulted in bad chipping quality. To reduce chipping/cracking induced by sawing, an alternative double-pass sawing method was developed and is explained in the paper. The methodology of this study discusses a double-pass method, where the first pass dice through the wafer and varied the percentage of DAF thickness cut. Best results were achieved when dicing through the wafer and 0% of DAF, followed by a full separation in the second pass. Approximately 80% of chipping reduction compared to conventional single pass.
  • Keywords
    assembling; chip scale packaging; cracks; elemental semiconductors; laminates; sawing; silicon; wafer bonding; 100 micron; atomic force microscopy; blade loading; chipping crack resistance; chipping quality; dicing process; die-attach film; double pass sawing method; energy dispersive X-ray analysis; laminated wafer; scanning electron microscopy micrographs; silicon wafer; silver fillers; Assembly; Atomic force microscopy; Blades; Coatings; Packaging; Sawing; Scanning electron microscopy; Stress; Wafer bonding; Wheels; Blade overloading; die-attach film; double-pass saw process; laminated wafer; lateral crack;
  • fLanguage
    English
  • Journal_Title
    Electronics Packaging Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-334X
  • Type

    jour

  • DOI
    10.1109/TEPM.2005.862625
  • Filename
    1583781