• DocumentCode
    808571
  • Title

    3.21 ps ECL gate using InP/InGaAs DHBT technology

  • Author

    Ishii, K. ; Nosaka, H. ; Ida, M. ; Kurishima, K. ; Shibata, T.

  • Author_Institution
    NTT Photonics Labs., NTT Corp., Kanagawa, Japan
  • Volume
    39
  • Issue
    20
  • fYear
    2003
  • Firstpage
    1434
  • Lastpage
    1436
  • Abstract
    A new circuit configuration for an emitter-coupled logic (ECL) gate that can reduce propagation delay time has been demonstrated. Nineteen-stage ring oscillators were fabricated using InP/InGaAs double-heterojunction bipolar transistors (DHBTs) with cutoff frequency fT and maximum oscillation frequency fmax of about 232 and 360 GHz, respectively, to evaluate the speed performance of the proposed ECL gate. The minimum propagation delay is 3.21 ps/gate. The proposed ECL gate is about 8% faster than the conventional ECL gate.
  • Keywords
    III-V semiconductors; bipolar logic circuits; delays; emitter-coupled logic; gallium arsenide; heterojunction bipolar transistors; indium compounds; logic gates; 232 GHz; 3.21 ps; 360 GHz; DHBT technology; ECL gate; InP-InGaAs; InP/InGaAs; cutoff frequency; emitter-coupled logic gate; maximum oscillation frequency; propagation delay; propagation delay time; ring oscillators; speed performance;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20030940
  • Filename
    1238586
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=808571