DocumentCode :
808781
Title :
Energy band diagram of a Si metal-oxide-semiconductor field-effect transistor
Author :
Fu, Ying ; Willander, Magnus
Author_Institution :
Dept. of Phys. & Meas. Technol., Linkoping Univ., Sweden
Volume :
42
Issue :
8
fYear :
1995
fDate :
8/1/1995 12:00:00 AM
Firstpage :
1522
Lastpage :
1527
Abstract :
We have calculated the energy band diagram of a Si metal-oxide-semiconductor field-effect transistor (FET) with two-storied gates most recently experimentally investigated by Matsuoka et al. (see Appl. Phys. Lett., vol. 64, p. 586, 1994). From out numerical calculations of the three-dimensional Hartree-Fock equation, it is found that the increase of the upper gate negative bias does not transform the simple quantum wire (conducting channel created by the lower gate) into coupled quantum dots, it only makes the conducting channel narrower. Without the lower gate, the system can be well approximated by a two-dimensional Laplace equation. By the corresponding analytical solution it is shown that only in the spatial region very close to the upper gate where can we observe very weak quantum barriers induced by individual metal lines in the upper gate. For the FET structure of Matsuoka et al., coupled quantum dots and thus Coulomb blockade effect are not very likely. The experimental results of transconductance and conductance as functions of upper gate and lower gate can be well explained by the carrier transport through the part of the conducting channel compressed by the upper gate. Precaution should therefore be exercised when analysing experimental results concerning small-size and quantum structure systems,.
Keywords :
MOSFET; band structure; elemental semiconductors; inversion layers; semiconductor quantum wires; silicon; MOSFET; Si-SiO2; carrier transport; conductance; conducting channel; energy band diagram; field-effect transistor; numerical calculations; quantum barriers; three-dimensional Hartree-Fock equation; transconductance; two-dimensional Laplace equation; two-storied gates; upper gate negative bias; FETs; Laplace equations; Nanofabrication; Poisson equations; Quantum capacitance; Quantum dots; Transconductance; Transforms; Voltage; Wire;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.398668
Filename :
398668
Link To Document :
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