Title :
A 4.2-ps ECL ring-oscillator in a 285-GHz fmax SiGe technology
Author :
Jagannathan, B. ; Meghelli, M. ; Rylyakov, A.V. ; Groves, R.A. ; Chinthakindi, A.K. ; Schnabel, C.M. ; Ahlgren, D.A. ; Freeman, G.G. ; Stein, K.J. ; Subbanna, S.
Author_Institution :
Microelectron. Semicond. Res. & Dev. Center, IBM Corp., Hopewell Junction, NY, USA
Abstract :
This letter reports on the room temperature operation of a conventional SiGe bipolar ECL ring oscillator with a minimum stage delay of 4.2 ps for /spl sim/250 mV single ended voltage swing. To our knowledge, this is the lowest reported delay for a gate fabricated using transistor devices. The circuit uses 0.12 × 2 μm2 emitter size SiGe n-p-n transistors with a room temperature fT of 207 GHz and fmax (unilateral gain extrapolation) of 285 GHz. The ring oscillator was studied as a function of various device and circuit parameters and it was found that minimum delay is more dependent on the parasitic resistance and capacitance in the n-p-n device than on pure transit time across the device.
Keywords :
Ge-Si alloys; bipolar integrated circuits; emitter-coupled logic; oscillators; semiconductor materials; 207 GHz; 250 mV; 285 GHz; 4.2 ps; SiGe; SiGe bipolar ECL ring oscillator; minimum stage delay; n-p-n transistor; parasitic capacitance; parasitic resistance; room temperature operation; transit time; CMOS technology; Circuits; Costs; Delay effects; Germanium silicon alloys; Heterojunction bipolar transistors; Ring oscillators; Silicon germanium; Silicon on insulator technology; Temperature;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2002.802654
