DocumentCode
81026
Title
Sleep power minimisation using adaptive duty-cycling of DC–DC converters in state-retentive systems
Author
Balsamo, Domenico ; Brunelli, Davide ; Paci, Giacomo ; Benini, Luca
Author_Institution
Dept. of Electr., Electron. & Inf. Eng. (DEI), Univ. of Bologna, Bologna, Italy
Volume
8
Issue
6
fYear
2014
fDate
11 2014
Firstpage
478
Lastpage
486
Abstract
Aggressive power management techniques, which combine hardware and software solutions, are fundamental for embedded computing platforms today, especially if they are battery operated. This paper proposes an adaptive low-level algorithm, which modulates the DC-DC converter activation for minimising quiescent current consumption. This algorithm allows a discontinuous usage of the DC-DC converter during the sleep time, without requiring modification in the user´s main program, by powering the system solely with the internal DC-DC converter capacitor and without using any other additional capacitors as an energy buffer. The algorithm computes the maximum interval between consecutive wake-ups necessary for the capacitor recharging at run-time. Intervals are decided by taking into account both the global leakage and the temperature-dependent variations of the capacitor. The proposed solution significantly enhances the lifetime of applications with a low activity rate, such as wireless sensor networks, while still guaranteeing efficient power delivery for high-current demand intervals.
Keywords
DC-DC power convertors; capacitors; embedded systems; low-power electronics; DC-DC converters; adaptive duty-cycling; capacitor recharging; embedded computing platforms; global leakage; internal DC-DC converter capacitor; low-level dynamic DC-DC management algorithm; power management; quiescent current consumption; sleep power minimisation; state-retentive systems; wireless sensor networks;
fLanguage
English
Journal_Title
Circuits, Devices & Systems, IET
Publisher
iet
ISSN
1751-858X
Type
jour
DOI
10.1049/iet-cds.2013.0466
Filename
6978096
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