Modeling and simulation of interconnection delays and crosstalks in high-speed integrated circuits

A computer model for n parallel microstrip lines is developed for circuit simulation. This model for the lossy transmission line system can be readily implemented into circuit simulators and can accurately simulate the delay and crosstalk effects of interconnects in high-speed integrated circuits. Modal analysis is applied to decouple the n-coupled-line system into n independent lines, and the characteristic solutions of telegraph equations are represented by a set of simple time-varying equivalent circuits. The model has been implemented in a general-purpose circuit simulator, iSMILE, which is compatible with SPICE. Simulation results on propagation delay times and crosstalk are presented for high-speed GaAs HEMT (high-electron-mobility transistor) integrated circuits