Alloyed junction Ge Esaki diodes on Si substrates realised by aspect ratio trapping technique

Author

Pawlik, D. ; Sieg, S. ; Kurinec, S.K. ; Rommel, S.L. ; Cheng, Z. ; Park, J.-S. ; Hydrick, J. ; Lochtefeld, A.

Author_Institution

Dept. of Microelectron. Eng., Rochester Inst. of Technol., Rochester, NY

Volume

44

Issue

15

fYear

2008

Firstpage

930

Lastpage

931

Abstract

A Ge Esaki diode is demonstrated on Si atop a coalesced epitaxial layer of Ge grown through narrow openings in SiO₂ that are used to trap threading dislocations from the lattice mismatch. Spin-on doping was used to form the n-type junction and a controlled alloyed reaction of Al and Ge forms the p-type junction. At an alloy temperature of 580 C for 1 s, the Ge-on-Si diodes were found to have a peak-to-valley current ratio of 1.1 with a peak current density of 4.1 kA/cm².

Keywords

Ge-Si alloys; aluminium; current density; dislocations; p-n junctions; semiconductor doping; semiconductor epitaxial layers; semiconductor growth; tunnel diodes; Esaki diodes; GeSi-Al-SiO₂; Si; aspect ratio trapping technique; coalesced epitaxial layer; controlled alloyed reaction; current density; germanium growth; lattice mismatch; n-type junction; p-type junction; peak-to-valley current ratio; spin-on doping; temperature 580 C; threading dislocations;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el:20081284

Filename

4568720