• DocumentCode
    811359
  • Title

    Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges

  • Author

    Wang, Hailing ; Chen, Ten-Lon ; Gildenblat, Gennady

  • Author_Institution
    Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA
  • Volume
    50
  • Issue
    11
  • fYear
    2003
  • Firstpage
    2262
  • Lastpage
    2272
  • Abstract
    A particularly simple form of the charge-sheet model (CSM) is developed using symmetric linearization of the bulk charge as a function of the surface potential. The new formulation is verified by comparison with the original form of the CSM and is used to obtain a simple and accurate expressions for the quasi-static (QS) terminal charges based on the Ward-Dutton partition. Combined with the spline collocation version of the weighted residuals method, symmetric linearization leads to a relatively simple version of the nonquasi-static (NQS) MOSFET model. The efficiency of the proposed approach to MOSFET modeling is enhanced by taking advantage of the recently developed noniterative algorithm for computing surface potential as a function of the terminal voltages. An important symmetry of the various MOSFET characteristics with respect to the source/drain interchange is preserved in both the QS and NQS versions of the symmetrically linearized CSM.
  • Keywords
    MOSFET; linearisation techniques; semiconductor device models; splines (mathematics); surface potential; MOSFET characteristics symmetry; Ward-Dutton partition; bulk charges; charge-sheet model; inversion charges; noniterative algorithm; nonquasi-static compact MOSFET models; quasi-static compact MOSFET models; quasi-static terminal charges; source/drain interchange; spline collocation version; surface potential; symmetric linearization; terminal voltages; weighted residuals method; Capacitance-voltage characteristics; Circuit simulation; Context modeling; Current-voltage characteristics; Equations; Linearization techniques; MOSFET circuits; Partitioning algorithms; Spline; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2003.818596
  • Filename
    1239053