Title :
Massively parallel architecture for quadratic digital filters
Author :
Hatzinakos, Dimitrios ; Nikias, Chrysostomos L. ; Venetsanopoulos, Anastasios N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fDate :
1/1/1990 12:00:00 AM
Abstract :
A massively parallel architecture for quadratic digital filters is introduced. It is obtained by using matrix and vector decomposition forms and consists of a set of parallel one-dimensional IIR (infinite-impulse-response) filters in cascade with square-in add-out types of operations. This architecture exhibits great modularity and regularity as well as flexibility and generality. The data throughput delay, cost (which is proportional to chip area), and roundoff error effects of the proposed structure are derived, and comparisons with other already available implementations are made
Keywords :
cascade networks; delays; digital filters; parallel architectures; roundoff errors; cascade; cost; data throughput delay; infinite-impulse-response; massively parallel architecture; matrix decomposition; parallel 1D IIR filters; quadratic digital filters; roundoff error effects; square-in add-out types; vector decomposition; Abstracts; Digital filters; Digital signal processing; Finite wordlength effects; Frequency; Gold; IIR filters; Notice of Violation; Parallel architectures; Transfer functions;
Journal_Title :
Circuits and Systems, IEEE Transactions on
