DISIPLE: digital signal processor programming language and environment

Author

Dunn, Stanley M. ; Peters, Joseph E. ; Finkel, Brian ; Neafsey, Laurajean

Author_Institution

Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA

Volume

38

Issue

11

fYear

1990

fDate

11/1/1990 12:00:00 AM

Firstpage

2001

Lastpage

2003

Abstract

A compiler for signal processing applications with high-level language control structures and the ability to express computational parallelism is described. There are two expert system back-ends that generate code using advice about the architecture of the target machine(s). The first back-end generates code for control flow, and the second generates code for computation. Both expert systems use a rule base that describes the number, type, and architecture of the target processors. If an instruction cannot be directly implemented functionally equivalent intermediate language statements are automatically generated. Currently, the prototype compiler generates TMS320 family assembly code and code for distributed memory parallel computers

Keywords

codes; computerised signal processing; digital signal processing chips; expert systems; high level languages; program compilers; programming environments; DISIPLE; TMS320 family assembly code; code using advice; compiler; computational parallelism; digital signal processing; distributed memory parallel computers; expert system back-ends; high-level language control structures; rule base; Automatic generation control; Computer architecture; Computer languages; Concurrent computing; Digital signal processors; Expert systems; High level languages; Parallel processing; Prototypes; Signal processing;

fLanguage

English

Journal_Title

Acoustics, Speech and Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

0096-3518

Type

jour

DOI

10.1109/29.103100

Filename

103100