Title :
Single-event effects in SOI technologies and devices
Author_Institution :
CEA, Centre d´´Etudes de Bruyeres-le-Chatel, France
fDate :
4/1/1996 12:00:00 AM
Abstract :
Due to their limited sensitive volumes for charge collection, silicon on insulator (SOI) technologies are good candidates for any microelectronic device operating in a space environment. While being insensitive to latchup phenomena, SOI devices may experience single-event effects (SEE´s). Based on the analysis of the various structures of SOI transistors, charge collection mechanisms are presented. The different models proposed to analyze the sensitivity of CMOS SRAM cells are then discussed. The available data of SEU characterizations are finally compiled
Keywords :
CMOS integrated circuits; Monte Carlo methods; SPICE; SRAM chips; digital simulation; elemental semiconductors; fault tolerant computing; integrated circuit modelling; ion beam effects; radiation effects; silicon; silicon-on-insulator; space vehicle electronics; CMOS SRAM cells; SOI devices; SOI technologies; SOI transistors; Si; Si on insulator; charge collection; latchup; microelectronic device; single-event effects; space environment; CMOS technology; Insulation life; Isolation technology; MOSFETs; Semiconductor films; Silicon on insulator technology; Single event upset; Space technology; Substrates; Thin film transistors;
Journal_Title :
Nuclear Science, IEEE Transactions on
