General purpose video processor for high speed filtering applications

A video processor that allows the implementation of high-speed finite impulse response (FIR) video filters is described. This is made possible by using a parallel architecture implemented on 1.2 μm CMOS EPROM technology. This solution makes it possible to overcome classical DSP (digital signal processing) problems such as processing speed, number of taps, flexibility, and volatility. The maximum achievable throughput in a single-chip configuration is 30 Mwords/s; such a processing speed allows comfortable use of the chip in the field of Rec. 601 (13.5 MHz sampling rate) while, in the case of HDTV (high-definition television), multiple-chip architectures may be configured to obtain a higher sampling rate