General purpose video processor for high speed filtering applications

Author

Airoldi, F. ; Cavollotti, F. ; Cremonesi, A. ; Rizzotto, GG

Author_Institution

SGS-Thomson Microelectron., Agrate Brianza, Italy

Volume

36

Issue

3

fYear

1990

fDate

8/1/1990 12:00:00 AM

Firstpage

334

Lastpage

338

Abstract

A video processor that allows the implementation of high-speed finite impulse response (FIR) video filters is described. This is made possible by using a parallel architecture implemented on 1.2 μm CMOS EPROM technology. This solution makes it possible to overcome classical DSP (digital signal processing) problems such as processing speed, number of taps, flexibility, and volatility. The maximum achievable throughput in a single-chip configuration is 30 Mwords/s; such a processing speed allows comfortable use of the chip in the field of Rec. 601 (13.5 MHz sampling rate) while, in the case of HDTV (high-definition television), multiple-chip architectures may be configured to obtain a higher sampling rate

Keywords

CMOS integrated circuits; EPROM; computerised picture processing; digital filters; parallel architectures; 1.2 micron; CMOS EPROM technology; FIR video filters; high speed filtering applications; parallel architecture; video processor; CMOS technology; Digital signal processing chips; EPROM; Filtering; Finite impulse response filter; HDTV; Parallel architectures; Signal sampling; TV; Throughput;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.103140

Filename

103140