DocumentCode
812718
Title
A chip set core for image compression
Author
Artieri, Alain ; Colavin, Oswald
Author_Institution
SGS-Thomson Microelectron., Grenoble, France
Volume
36
Issue
3
fYear
1990
fDate
8/1/1990 12:00:00 AM
Firstpage
395
Lastpage
402
Abstract
Two components for image compression which provide almost all the computational power required by today´s efficient codecs for full motion image compression are presented. The first component computes 8×8 discrete-cosine transform and zigzag conversion of coefficient scanning for a pixel rate up to 27 MHz. The second component computes full-search motion estimation for a pixel rate up to 18 MHz. System implementation for image compression is discussed
Keywords
CMOS integrated circuits; computerised picture processing; data compression; digital signal processing chips; television systems; transforms; coefficient scanning; discrete-cosine transform; full-search motion estimation; image compression; pixel rate; zigzag conversion; Discrete cosine transforms; Image coding; Image communication; Image storage; Microelectronics; Motion compensation; Motion estimation; Predictive coding; Standardization; Very large scale integration;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/30.103150
Filename
103150
Link To Document