• DocumentCode
    813676
  • Title

    Minimal multiplier realization of 1-D all-pass digital filters

  • Author

    Reddy, P.S. ; Satyanarayana, P. ; Swamy, M.N.S.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Concordia Univ., Montreal, Que., Canada
  • Volume
    37
  • Issue
    2
  • fYear
    1990
  • fDate
    2/1/1990 12:00:00 AM
  • Firstpage
    299
  • Lastpage
    302
  • Abstract
    A structure for realization of Nth-order one-dimensional all-pass digital filters containing N multipliers is presented. The Nth-order all-pass transfer function is realized as whole as opposed to realization using a cascade of the first- or second-order filters. The method is simple, and the resulting structure contains N multipliers and N unit delay elements
  • Keywords
    all-pass filters; digital filters; multiplying circuits; transfer functions; 1-D all-pass digital filters; Nth-order one-dimensional all-pass digital filters; multipliers; transfer function; unit delay elements; Circuit simulation; Circuit stability; Circuits and systems; Computer simulation; Digital filters; Electrons; Frequency; Operational amplifiers; Quadratic programming; Stability analysis;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/31.45727
  • Filename
    45727
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=813676