• DocumentCode
    813937
  • Title

    Performance modeling using additive regression splines

  • Author

    Chao, Chieh-Yuan ; Milor, Linda S.

  • Author_Institution
    Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
  • Volume
    8
  • Issue
    3
  • fYear
    1995
  • fDate
    8/1/1995 12:00:00 AM
  • Firstpage
    239
  • Lastpage
    251
  • Abstract
    Circuit designers need to be able to predict variations in circuit performance as a function of variations in process parameters. Often the relation between process parameters and circuit performances is highly nonlinear, and the process is described by a large number of independent variables. Traditional approaches to modeling, like, polynomial regression, are not very accurate for such problems. In order to build accurate nonlinear models for high-dimensional problems, an algorithm has been implemented based on additive regression splines. The model building process is fully automated. The algorithm is used to build a model to predict the offset voltage of a parallel filter bank. This example demonstrates that very accurate nonlinear models can be constructed very efficiently
  • Keywords
    VLSI; circuit optimisation; integrated circuit yield; semiconductor process modelling; splines (mathematics); statistical analysis; additive regression splines; circuit performance; circuit yield; high-dimensional problems; model building process; nonlinear models; parallel filter bank; performance modeling; process parameters; Analytical models; Buildings; Chaos; Circuit optimization; Circuit simulation; Equations; Manufacturing processes; Monte Carlo methods; Performance analysis; Polynomials;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/66.400998
  • Filename
    400998