Title :
Improved 2-port systolic adaptor for wave digital filters
Author :
Lawson, S.S. ; Mirzai, A.R.
Author_Institution :
Dept. of Eng., Warwick Univ., Coventry, UK
fDate :
6/1/1989 12:00:00 AM
Abstract :
It has been shown previously that a bit-level systolic adaptor can be developed from input/output equations. The design, however, was not fully pipelined and so did not make full use of the power inherent in systolic processors. The authors present an improved architecture which exhibits much higher throughput and CMOS implementation of this is considered. A simple modification to allow internal subtraction is also given and this is contrasted with externally complementing one of the inputs.<>
Keywords :
CMOS integrated circuits; VLSI; cellular arrays; circuit analysis computing; multiport networks; parallel architectures; wave digital filters; 2-port systolic adaptor; CMOS implementation; HILO-3 model; VLSI; internal subtraction; parallel processing array; two port adaptor; wave digital filters; CMOS integrated circuits; Cellular logic arrays; Circuit simulation; Multiport circuits; Parallel architectures; Very-large-scale integration; Wave digital filters;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings G
