Title :
A CMOS feedforward neural-network chip with on-chip parallel learning for oscillation cancellation
Author :
Liu, Jin ; Brooke, Martin A. ; Hirotsu, Kenichi
Author_Institution :
Dept. of Electr. Eng., Texas Univ., Richardson, TX, USA
fDate :
9/1/2002 12:00:00 AM
Abstract :
The paper presents a mixed signal CMOS feedforward neural-network chip with on-chip error-reduction hardware for real-time adaptation. The chip has compact on-chip weighs capable of high-speed parallel learning; the implemented learning algorithm is a genetic random search algorithm: the random weight change (RWC) algorithm. The algorithm does not require a known desired neural network output for error calculation and is suitable for direct feedback control. With hardware experiments, we demonstrate that the RWC chip, as a direct feedback controller, successfully suppresses unstable oscillations modeling combustion engine instability in real time.
Keywords :
CMOS integrated circuits; FIR filters; feedback; feedforward neural nets; genetic algorithms; learning (artificial intelligence); mixed analogue-digital integrated circuits; neural chips; search problems; RWC chip; analog finite impulse response filter; compact on-chip weighs; direct feedback control; direct feedback controller; error calculation; genetic random search algorithm; high-speed parallel learning; learning algorithm; mixed signal CMOS feedforward neural-network chip; neural-network output; on-chip error-reduction hardware; on-chip parallel learning; oscillation cancellation; random weight change algorithm; real time; real-time adaptation; unstable oscillations modeling combustion engine instability; Adaptive control; Application software; Circuits; Computational modeling; Computer networks; Concurrent computing; Feedback control; Neural network hardware; Neural networks; Parallel processing;
Journal_Title :
Neural Networks, IEEE Transactions on
DOI :
10.1109/TNN.2002.1031948