DocumentCode :
815115
Title :
Simple Statistical Analysis Techniques to Determine Optimum Sense Amp Set Times
Author :
Houle, Robert M.
Author_Institution :
IBM, Essex Junction, VT
Volume :
43
Issue :
8
fYear :
2008
Firstpage :
1816
Lastpage :
1825
Abstract :
Statistical analysis techniques are described, involving a relatively small number of actual circuit simulations, to accurately determine the optimum sense amp set time for SRAM designs. Techniques to generate and evaluate the statistical distributions for bit line leakage, signal development, sense amp asymmetry and timing fluctuations in control circuits are discussed with important implications to sense amp design. The procedure is outlined in detail using representative circuits and simulations from a 65 nm CMOS bulk technology.
Keywords :
CMOS integrated circuits; SRAM chips; circuit simulation; integrated circuit design; logic design; statistical distributions; CMOS bulk technology; SRAM design; bit line leakage; circuit simulation; control circuit; optimum sense amp set time; sense amp asymmetry; signal development; size 65 nm; statistical analysis; statistical distribution; timing fluctuation; CMOS technology; Circuit simulation; Fluctuations; Probability; Random access memory; Stability; Statistical analysis; Switches; Threshold voltage; Timing; Circuit statistical analysis; Gumbel distribution; SRAM leakage; SRAM read margin; probability of correct sense amp read; sense amp; threshold voltage variability;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2008.925405
Filename :
4578756
Link To Document :
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