DocumentCode
815264
Title
Power consumption modeling and characterization of the TI C6201
Author
Julien, Nathalie ; Laurent, Johann ; Senn, Eric ; Martin, Eric
Author_Institution
Univ. of South Brittany, Lorient, France
Volume
23
Issue
5
fYear
2003
Firstpage
40
Lastpage
49
Abstract
This new approach characterizes power dissipation on complex dsps. its processor model relies on an initial functional-level power analysis of the target processor together with a characterization that qualifies the more significant architectural and algorithmic parameters for power dissipation. these parameters come from a simple profiling of the assembly code. This functional model accounts for deeply pipelined, superscalar, and hierarchical memory architectures.
Keywords
computer architecture; digital signal processing chips; performance evaluation; power consumption; DSPs; T1 C6201; assembly code; power dissipation; Algorithm design and analysis; Application software; Computational modeling; Computer architecture; Current measurement; Digital signal processing; Energy consumption; Pipelines; Power dissipation; VLIW;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2003.1240211
Filename
1240211
Link To Document