DocumentCode
815278
Title
Experimental Comparison Between Sub-0.1-
Ultrathin SOI Single- and Double-Gate MOSFETs: Performance and Mobility
Author
Widiez, Julie ; Poiroux, Thierry ; Vinet, Maud ; Mouis, Mireille ; Deleonibus, Simon
Author_Institution
LETI, CEA Grenoble
Volume
5
Issue
6
fYear
2006
Firstpage
643
Lastpage
648
Abstract
This paper presents an experimental comparison between single-gate (SG) and double-gate (DG) transistors performance. Using a novel process flow, we managed to cointegrate these two devices on the same wafer with a TiN metal gate. Short-channel effect control, static performance, and mobility are quantified for each architecture. An in-depth mobility study is performed for a wide range of temperatures (10 K-300 K) and gate lengths (10-20 nm) while channel thickness is fixed at 6 nm. This study experimentally highlights the advantages of DG devices over SG transistors. Good mobility values are obtained for both architectures and we show the advantages of ultrathin body devices over bulk transistors. Finally, we demonstrate that Coulomb scattering is the primary cause of the mobility degradation in short-channel devices
Keywords
MOSFET; silicon-on-insulator; titanium compounds; 10 to 300 K; Coulomb scattering; Si; TiN; gate lengths; low field mobility; metal gate; mobility degradation; short-channel effect control; silicon-on-insulator technology; static performance; ultrathin SOI double-gate MOSFET; ultrathin SOI single-gate MOSFET; ultrathin body devices; CMOS technology; Conferences; Degradation; Electrostatics; MOSFETs; Nanoelectronics; Scattering; Silicon on insulator technology; Temperature distribution; Tin; Coulomb scattering; MOSFETs; double-gate (DG); low field mobility; metal gate; silicon-on-insulator (SOI) technology;
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2006.886786
Filename
4011944
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