• DocumentCode
    815582
  • Title

    A Flexible Architecture for Precise Gamma Correction

  • Author

    Lee, Dong-U ; Cheung, Ray C C ; Villasenor, John D.

  • Author_Institution
    Electr. Eng. Dept., California Univ., Los Angeles, CA
  • Volume
    15
  • Issue
    4
  • fYear
    2007
  • fDate
    4/1/2007 12:00:00 AM
  • Firstpage
    474
  • Lastpage
    478
  • Abstract
    We present a flexible hardware architecture for precise gamma correction via piece-wise linear polynomial approximations. Arbitrary gamma values, input bit widths, and output bit widths are supported. The gamma correction curve is segmented via a combination of uniform segments and segments whose sizes vary by powers of two. This segmentation method minimizes the number of segments required, while providing an efficient way for indexing the polynomial coefficients. The outputs are guaranteed to be accurate to one unit in the last place through an analytical bit-width analysis methodology. Hardware realizations of various gamma correction designs are demonstrated on a Xilinx Virtex-4 field-programmable gate array (FPGA). A pipelined 12-bit input/8-bit output design on an XC4VLX100-12 FPGA occupies 146 slices and one digital signal processing slice. It is capable of performing 378 million gamma correction operations per second
  • Keywords
    field programmable gate arrays; gamma distribution; piecewise linear techniques; piecewise polynomial techniques; Xilinx Virtex-4 field-programmable gate array; fixed-point arithmetic; flexible architecture; gamma correction curve; piecewise linear polynomial approximations; polynomial coefficients; precise gamma correction; video signal processing; Cathode ray tubes; Field programmable gate arrays; Hardware; Liquid crystal displays; Piecewise linear techniques; Plasma displays; Polynomials; Quantization; Table lookup; Voltage; Displays; field programmable gate arrays (FPGAs); fixed-point arithmetic; video signal processing;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2007.893671
  • Filename
    4162510