DocumentCode
815747
Title
An Analog 2-D DCT Processor
Author
Pankaala, Mikko ; Virtanen, Kati ; Paasio, Ari
Author_Institution
Dept. of Inf. Technol., Turku Univ.
Volume
16
Issue
10
fYear
2006
Firstpage
1209
Lastpage
1216
Abstract
This paper presents a simple and low-cost analog architecture for computing 2-D discrete cosine transform (2-D DCT). The proposed circuit is aimed for low-power or very high-speed moderate image quality video compression applications. The design uses current-mode signaling and has two separate 1-D DCT kernels, thus no memory is needed for storing intermediate results. Moreover, the circuit works in continuous time. Simple current mirrors have been used to realize all the needed matrix operations and the transistors are dimensioned in such a way that current level of 20 muA is not exceeded to ensure low-power operation. A prototype chip which includes both 4-point and 8-point forward transforms has been fabricated in a 0.18-mum digital CMOS technology. The operation of the circuit is analyzed with help of measurement results obtained from test chips
Keywords
CMOS digital integrated circuits; data compression; discrete cosine transforms; matrix algebra; video coding; 1D DCT kernels; 20 muA; 2D discrete cosine transform; 4-point forward transforms; 8-point forward transforms; analog 2D DCT processor; current mirrors; current-mode signaling; digital CMOS technology; image quality video compression; matrix operations; prototype chip; Discrete cosine transform (DCT); image coding;
fLanguage
English
Journal_Title
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher
ieee
ISSN
1051-8215
Type
jour
DOI
10.1109/TCSVT.2006.882392
Filename
4011987
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