DocumentCode :
815753
Title :
Crosstalk- and performance-driven multilevel full-chip routing
Author :
Ho, Tsung-Yi ; Chang, Yao-Wen ; Chen, Sao-Jie ; Lee, Der-Tsai
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
24
Issue :
6
fYear :
2005
fDate :
6/1/2005 12:00:00 AM
Firstpage :
869
Lastpage :
878
Abstract :
In this paper, we propose a novel framework for fast multilevel routing considering crosstalk and performance optimization. To handle the crosstalk minimization problem, we incorporate an intermediate stage of layer/track assignment into the multilevel routing framework. For performance-driven routing, we propose a novel minimum-radius minimum-cost spanning tree heuristic for global routing. Compared with the state-of-the-art multilevel routing with the routability mode, the experimental results show that our router achieved a 6.7X runtime speedup, reduced the respective maximum and average crosstalk (coupling length) by about 30% and 24%, reduced the respective maximum and average delay by about 15% and 5%. Compared with the timing-driven mode, the experimental results show that our router still achieved a 5.9X runtime speedup, reduced the respective maximum and average crosstalk by about 35% and 23%, reduced the respective maximum and average delay by about 7% and 10% in comparable routability, and resulted in fewer failed nets.
Keywords :
circuit optimisation; crosstalk; integrated circuit layout; crosstalk minimization; detailed routing; global routing; layer/track assignment; minimum-radius minimum-cost spanning tree heuristic; multilevel full-chip routing; noise optimization; performance-driven routing; physical design; timing optimization; timing-driven mode; Coupling circuits; Crosstalk; Delay; Design optimization; Minimization; Partitioning algorithms; Routing; Runtime; Timing; Wires; Detailed routing; global routing; layout; noise optimization; physical design; routing; timing optimization;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2005.847902
Filename :
1432878
Link To Document :
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