Title : 
Novel Dielectric-Constant Evaluation Method for Low-
  
  Multilevel Metallization Structures in ULSI
 
        
            Author : 
Takimoto, Yoshio ; Maeda, Nobuhide
         
        
            Author_Institution : 
Consortium for Adv. Semicond. Mater. & Related Technol. (CASMAT), Tokyo
         
        
        
        
        
            fDate : 
5/1/2009 12:00:00 AM
         
        
        
        
            Abstract : 
Precise evaluation of the dielectric constants of low-k interlayer dielectrics in ULSI is essential in order to analyze the effects of their fabrication process and their structure on their k -values. However, this is difficult to achieve in complicated multilayer structures with various kinds of stacked films having different physical properties. To address this problem, we have developed a novel evaluation method that makes it possible to precisely analyze the effects of structure and fabrication process on the k -values of dielectrics.
         
        
            Keywords : 
ULSI; integrated circuit metallisation; low-k dielectric thin films; multilayers; permittivity; ULSI; dielectric-constant evaluation method; fabrication process; low-k multilevel metallization structure; Capacitance; Capacitors; Dielectric constant; Dielectric materials; Equations; Fabrication; Nonhomogeneous media; Testing; Ultra large scale integration; Wiring; $k$ value; $k$-value extraction; Capacitance; RC delay; RC extraction; chemical vapor deposition (CVD); device simulation; dielectric constant; effective $k$ -value; evaluation method; interconnect; low-$k$  dielectrics; spin on dielectrics (SOD); test structure;
         
        
        
            Journal_Title : 
Semiconductor Manufacturing, IEEE Transactions on
         
        
        
        
        
            DOI : 
10.1109/TSM.2009.2017630