DocumentCode :
815916
Title :
Joint Prediction Algorithm and Architecture for Stereo Video Hybrid Coding Systems
Author :
Ding, Li-Fu ; Chien, Shao-Yi ; Chen, Liang-Gee
Author_Institution :
Dept. of Electr. Eng, Nat. Taiwan Univ., Taipei
Volume :
16
Issue :
11
fYear :
2006
Firstpage :
1324
Lastpage :
1337
Abstract :
3-D video will be the most prominent video technology in the next generation. Among the 3-D video technologies, stereo video systems are considered to be realized first in the near future. Stereo video systems require double bandwidth and more than twice the computational complexity relative to mono-video systems. Thus, an efficient coding scheme is necessary for transmitting stereo video. In this paper, a new structure of prediction core in stereo video coding systems is proposed from the algorithm level to the hardware architecture level. The joint prediction algorithm (JPA), which combines three prediction schemes, is proposed for high coding efficiency and low computational complexity. It makes the system outperform MPEG-4 temporal scalability and simple profile by 2-3 dB in rate-distortion performance. Besides, JPA also utilizes the characteristics of stereo video and successfully reduces about 80% computational complexity. Then, a new hardware architecture of the prediction core based on JPA and a modified hierarchical search block-matching algorithm is proposed. With a special data flow, no bubble cycles exist during the block-matching process. The proposed architecture also adopts the near-overlapped candidates reuse scheme to save the heavy burden of data access. Besides, both on-chip memory requirement and off-chip memory bandwidth can be reduced by the proposed new scheduling. Compared with the hardware requirement for the implementation of full search block-matching algorithm, only 11.5% on-chip SRAM and 3.3% processing elements are needed with a tiny PSNR drop, making it area-efficient while maintaining high stereo video quality and processing capability
Keywords :
computational complexity; image matching; scheduling; search problems; video coding; MPEG-4 temporal scalability; PSNR; computational complexity; hardware architecture level; joint prediction algorithm; modified hierarchical search block-matching algorithm; mono-video systems; off-chip memory bandwidth; on-chip memory; scheduling; stereo video hybrid coding systems; 3-D video; Hardware architecture; joint prediction algorithm (JPA); stereo video coding;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/TCSVT.2006.883510
Filename :
4012001
Link To Document :
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