DocumentCode :
815983
Title :
A spintronics full adder for magnetic CPU
Author :
Meng, Hao ; Wang, Jianguo ; Wang, Jian-Ping
Author_Institution :
the Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA
Volume :
26
Issue :
6
fYear :
2005
fDate :
6/1/2005 12:00:00 AM
Firstpage :
360
Lastpage :
362
Abstract :
Spintronics devices are based on the up or down spin of the electrons rather than on electrons or holes as in the traditional semiconductor electronics devices. Magnetic processors using spintronics devices in principle are much faster and with the potential features of nonvolatile, lower power consumption and higher integration density compared with transistor-based microprocessor. Full adder is one of the most important basic units of the arithmetic/logic unit for any processors. The design of the full adder determines the speed and chip-density of a processor. In this paper, a novel spintronics full adder is proposed based on novel programmable spintronics logic devices. Only seven magnetic tunnel junction elements are needed for this full adder design.
Keywords :
adders; magnetic tunnelling; magnetoelectronics; microprocessor chips; programmable logic devices; magnetic CPU; magnetic random access memory; magnetic tunnel junction elements; magnetoresistance; programmable spintronics logic devices; spintronics full adder; spintronics logic device; Adders; Arithmetic; Charge carrier processes; Energy consumption; Logic devices; Magnetic devices; Magnetic semiconductors; Magnetoelectronics; Microprocessors; Process design; Full adder; magnetic CPU; magnetic random access memory (MRAM); magnetic tunnel junction; magnetoresistance; programmable; spintronics logic device;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2005.848129
Filename :
1432899
Link To Document :
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