• DocumentCode
    816112
  • Title

    STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits

  • Author

    Harvey, J. Paul ; Elmasry, Mohamed I. ; Leung, Bosco

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
  • Volume
    11
  • Issue
    11
  • fYear
    1992
  • fDate
    11/1/1992 12:00:00 AM
  • Firstpage
    1402
  • Lastpage
    1417
  • Abstract
    STAIC is an interactive design tool that synthesizes CMOS and BiCMOS analog integrated circuits that conform to specified performance constraints. STAIC features an input modeling language for entering hierarchical circuit descriptions and a symbolic/numeric solve unit that dynamically integrates analytical model equations across hierarchical boundaries. The output of the solver is a flattened homogeneous model that is customized to a user-specified topology and set of performance specifications. The output is thus tailored for optimization and other numerically intense design exploration procedures. All model descriptions include physical layout so that important net parasitics may be fully accounted for during design evaluation. Synthesis proceeds via a successive solution refinement methodology. Multilevel models of increasing sophistication are used by scan and optimization modules to converge to what is likely a globally optimal solution. Design experiments have shown that STAIC can produce satisfactory results
  • Keywords
    BiCMOS integrated circuits; CMOS integrated circuits; circuit CAD; circuit layout CAD; integrated circuit technology; interactive systems; linear integrated circuits; BiCMOS analog circuits; CMOS analogue circuits; STAIC; analytical model equations; flattened homogeneous model; globally optimal solution; hierarchical circuit descriptions; input modeling language; interactive design tool; interactive framework; multilevel models, IC synthesis; optimization modules; performance specifications; physical layout; scan modules; successive solution refinement methodology; symbolic/numeric solve unit; user-specified topology; Analog circuits; Analog integrated circuits; Analytical models; BiCMOS integrated circuits; CMOS analog integrated circuits; Circuit synthesis; Circuit topology; Integrated circuit synthesis; Semiconductor device modeling; System performance;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.177403
  • Filename
    177403