DocumentCode :
816535
Title :
1/f noise in n- and p-channel MOS devices through irradiation and annealing
Author :
Meisenheimer, T.L. ; Fleetwood, D.M. ; Shaneyfelt, M.R. ; Riewe, L.C.
Author_Institution :
Sandia Nat. Lab., Albuquerque, NM, USA
Volume :
38
Issue :
6
fYear :
1991
fDate :
12/1/1991 12:00:00 AM
Firstpage :
1297
Lastpage :
1303
Abstract :
The 1/f noise of n- and p-channel MOS transistors was investigated through irradiation and biased anneals. While the increase in noise during irradiation is similar for both types of devices, the noise differs significantly in response to biased anneals. In particular, the noise decreases with decreasing ΔVot during positive-bias anneals in nMOS transistors but increases during positive-bias anneals for pMOS transistors. Conversely, negative bias anneals increase the noise in nMOS devices but decrease the noise in pMOS devices. These results are explained in terms of majority carrier trapping and detrapping at oxide defects near the Si/SiO2 interface. Under normal operating bias conditions (positive bias for nMOS and negative bias for pMOS), the 1/f noise of both n- and p-channel transistors decreases through postirradiation annealing
Keywords :
X-ray effects; annealing; electron device noise; gamma-rays; insulated gate field effect transistors; semiconductor-insulator boundaries; 1/f noise; MOS transistors; Si-SiO2 interface; annealing; biased anneals; detrapping at oxide defects; irradiation; majority carrier trapping; nMOS transistors; noise reduction; pMOS transistors; postirradiation annealing; Annealing; Circuit noise; Contracts; Laboratories; MOS devices; MOSFETs; Noise measurement; Semiconductor device measurement; Testing; Working environment noise;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.124108
Filename :
124108
Link To Document :
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