• DocumentCode
    816717
  • Title

    Enhancement of the Flatband Modulation of Ni-Silicided Gates on Hf-Based Dielectrics

  • Author

    Yang, Jian-Jun ; Wang, Xin-Peng ; Zhu, Chun-Xiang ; Li, Ming-Fu ; Yu, Hong-Yu ; Loh, Wei-Yip ; Kwong, Dim-Lee

  • Author_Institution
    Dept. Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
  • Volume
    55
  • Issue
    8
  • fYear
    2008
  • Firstpage
    2238
  • Lastpage
    2245
  • Abstract
    For the first time, the effect of the poly-Si gate electrode deposition process on the electrical characteristics of Ni-based fully silicided/HfO2 gate stacks is investigated. The flat- band voltage Vfb of Ni2Si/HfO2 (or Ni3Si/HfO2) with a physical vapor deposited (PVD) Si electrode was found to significantly shift to the positive direction by 0.27 V (or 0.15 V), compared to the case with a chemical vapor deposited (CVD) Si electrode. On the contrary, the Vfb of NiSi/HfO2 with a PVD Si electrode slightly shifts to the negative direction from that with a CVD Si electrode (~0.05 V). Further, La is incorporated into HfO2 to enhance the Vfb modulation of NiXSi gates with a PVD Si gate to near the conduction band edge of Si (~4.0 eV). We believe that the Vfb shift of NiXSi/HfO2 is attributed to the release of Fermi-level pinning at the interface between the Si gate electrode and HfO2, arising from the different Si electrode formation process.
  • Keywords
    Fermi level; chemical vapour deposition; dielectric materials; electrodes; elemental semiconductors; hafnium compounds; nitrogen compounds; silicon; Fermi-level pinning; Ni2Si-HfO2; chemical vapor deposited electrode; dielectrics; electrical characteristics; electrode formation process; flatband modulation enhancement; gate stacks; polysilicon gate electrode deposition process; silicided gates; Atherosclerosis; CMOS technology; Dielectrics; Electric variables; Electrodes; Hafnium oxide; Laboratories; Microelectronics; Silicon; Voltage; $hbox{HfO}_{2}$; Chemical vapor deposited (CVD); Fermi-level pinning; HfLaO; Ni-based fully silicided (FUSI) gate; flatband voltage $(V_{rm fb})$; physical vapor deposited (PVD);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2008.926581
  • Filename
    4578897