Title :
Experimental study of the electrical performance of isolation structures
Author :
Coppée, J.L. ; Van de Wiele, Fernand
Author_Institution :
Lab. de Microelectron., Univ. Catholique de Louvain, Belgium
Abstract :
The electrical behaviour of the parasitic Al-gate MOS transistor on LOCOS and SILO isolation structures is investigated. The influence of the two-dimensional parasitic channel on the isolation performances is pointed out by studying the bird´s-beak length, the field oxide thickness, and the use of a semi- or fully recessed structure. The measured characteristics are discussed and explained with the assistance of the two-dimensional process simulations of the isolation structures.<>
Keywords :
field effect integrated circuits; integrated circuit technology; large scale integration; Al; CMOS; LOCOS; LSI; NMOS; SILO; bird´s-beak length; electrical performance; field oxide thickness; fully recessed structure; isolation structures; parasitic Al-gate MOS transistor; process simulations; semirecessed structure; two-dimensional parasitic channel; Aluminum; CMOS technology; Circuit simulation; Isolation technology; Large scale integration; MOS devices; MOSFETs; Oxidation; Silicon;
Journal_Title :
Electron Device Letters, IEEE
