DocumentCode :
817317
Title :
Design for Diagnosability Guidelines
Author :
Ungar, Louis Y.
Author_Institution :
UCLA, Los Angeles, CA
Volume :
11
Issue :
4
fYear :
2008
fDate :
8/1/2008 12:00:00 AM
Firstpage :
24
Lastpage :
32
Abstract :
In this paper, we will define some of the terminology, provide a model for the diagnostic process, and highlight areas of diagnostic complications. We will apply the diagnostic complications in a Venn diagram to get a better illustration and possibly create a basis for diagnosability metrics in future work. With the tools at hand, we will finally tackle the design issues by hypothesizing on various causes of each diagnostic complication and providing some (though not exhaustive) DFD guidelines.
Keywords :
circuit testing; design for testability; network synthesis; DFT; Venn diagram; design for diagnosability; design for testability; diagnostic complications; guidelines; repair process; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Design for testability; Guidelines; Integrated circuit testing; Software testing; System testing;
fLanguage :
English
Journal_Title :
Instrumentation & Measurement Magazine, IEEE
Publisher :
ieee
ISSN :
1094-6969
Type :
jour
DOI :
10.1109/MIM.2008.4579268
Filename :
4579268
Link To Document :
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