Title :
A pyramid-based front-end processor for dynamic vision applications
Author_Institution :
David Sarnoff Res. Center, Princeton, NJ, USA
fDate :
7/1/2002 12:00:00 AM
Abstract :
Real-time vision tasks such as autonomous driving require prodigious computing power yet practical vision systems need to be compact and low cost. I suggest that such systems can be partitioned into two computing stages, for "front-end processing" and "high-level interpretation," respectively, and that each of these stages can be implemented as a single integrated circuit or a small number of such circuits. The two stages differ in data representation and computing architecture: The front-end stage operates on sampled image data and its computations are performed on a processor optimized for signal level processing. The high-level stage operates on abstract and symbolic image data and its computations ate performed on a general-purpose microprocessor. In this paper I describe a "segmented pipeline" architecture for front-end processing and a chip level processor implementation. This vision front-end processor is designed to support early vision functions, such as feature enhancement and motion and stereo analysis, for a broad range of dynamic vision applications. The approach makes systematic use of a multiresolution pyramid framework to achieve high computational efficiency, robustness, and precision.
Keywords :
computer vision; parallel architectures; pipeline processing; real-time systems; computational efficiency; computer vision; computing architecture; data representation; multiresolution pyramid; real-time vision; robustness; segmented pipeline; vision front-end processor; Circuits; Computer architecture; Computer vision; Costs; High performance computing; Image segmentation; Machine vision; Microprocessors; Real time systems; Signal processing;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/JPROC.2002.801455