Title :
High-end server system partitioning for cost reduction
Author :
Katopis, George A. ; Zhou, Tingdong ; Thornton, Mark
Author_Institution :
IBM Corp., Poughkeepsie, NY, USA
Abstract :
In this paper, we demonstrate the use of finite-dimension linear programming to maximize the number of partial good multicore processor chips in a symmetric multiprocessing (SMP) node of a given logical size and physical footprint. It is asserted that to the first order the cost of a productized processor chip will be proportional to the scrap of a processor chip containing good cores but being unusable for the implementation of an SMP node. Therefore, the tradeoff between the number of processing units (PUs) on a chip and the total number of PUs on an SMP node is examined. This paper shows that an optimized SMP offering can be found so that the total chip cost of a high-end system can be minimized. However, such cost reduction will limit the SMP node size for a given processor chip yield. It will also be shown that as the chip yield improves the SMP node size that can be profitably implemented will increase.
Keywords :
circuit optimisation; integrated circuit yield; linear programming; logic partitioning; microprocessor chips; high-end system; linear programming; multicore processor chips; processing units; processor chip yield; server system partitioning; symmetric multiprocessing node; system cost; Chip scale packaging; Cost function; Design optimization; Hardware; Linear programming; Multicore processing; Process design; Testing; Timing; Yield estimation; Chip yield; linear programming; multicore chip technology; server system partitioning; system cost;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/TADVP.2005.862644