DocumentCode :
818498
Title :
Two-dimensional methodology for modeling radiation-induced off-state leakage in CMOS technologies
Author :
Esqueda, Ivan Sanchez ; Barnaby, Hugh J. ; Alles, Michael L.
Author_Institution :
Arizona State Univ., Tempe, AZ, USA
Volume :
52
Issue :
6
fYear :
2005
Firstpage :
2259
Lastpage :
2264
Abstract :
A modeling approach using two-dimensional device simulations is presented, which enables the extraction of parameters for the radiation-induced parasitic MOSFET created at the edge of the shallow trench isolation (STI) oxide. With the model, one can estimate drain-to-source off-state leakage current (IOFF) resulting from build-up of oxide trapped charge (NOT). The impact of nonuniform NOT build-up in the STI resulting from total ionizing dose (TID) exposure and external bias conditions is analyzed through volumetric simulations and compared to experimental data. Saturation for the off-state leakage current as a function of trapped charge is also investigated.
Keywords :
CMOS integrated circuits; integrated circuit modelling; isolation technology; leakage currents; radiation hardening (electronics); CMOS technology; drain-to-source off-state leakage current; external bias condition; oxide trapped charge; radiation-induced parasitic MOSFET; shallow trench isolation oxide; total ionizing dose exposure; two-dimensional device simulation; Analytical models; CMOS technology; Circuit simulation; Circuit testing; Dielectrics; Isolation technology; Leakage current; MOSFET circuits; Semiconductor device modeling; Threshold voltage; MOSFET; Oxide trapped charge; off-state leakage current; shallow trench isolation (STI); total ionizing dose (TID);
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2005.860671
Filename :
1589192
Link To Document :
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