DocumentCode :
818502
Title :
Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device
Author :
Fekete, Sándor P. ; van Der Veen, Jan C. ; Ahmadinia, Ali ; Göhringer, Diana ; Majer, Mateusz ; Teich, Jürgen
Author_Institution :
Dept. of Comput. Sci., Braunschweig Univ. of Technol., Braunschweig
Volume :
16
Issue :
9
fYear :
2008
Firstpage :
1210
Lastpage :
1219
Abstract :
Modern generations of field-programmable gate arrays (FPGAs) allow for partial reconfiguration. In an online context, where the sequence of modules to be loaded on the FPGA is unknown beforehand, repeated insertion and deletion of modules leads to progressive fragmentation of the available space, making defragmentation an important issue. We address this problem by proposing an online and an offline component for the defragmentation of the available space. We consider defragmenting the module layout on a reconfigurable device. This corresponds to solving a 2D strip packing problem. Problems of this type are NP-hard in the strong sense, and previous algorithmic results are rather limited. Based on a graph-theoretic characterization of feasible packings, we develop a method that can solve 2D defragmentation instances of practical size to optimality. Our approach is validated for a set of benchmark instances. We also discuss a simple strategy for dealing with online scenarios, called ldquoleast-interference fitrdquo (LIF); we give a number of analytic results that allow a comparison of LIF with the best offline solution, and demonstrate that it works well on benchmark instances of moderate size.
Keywords :
circuit layout; field programmable gate arrays; graph theory; reconfigurable architectures; NP-hard; field-programmable gate array; graph theory; least-interference fit; module layout defragmentation; reconfigurable device; strip packing; 2-D packing; Defragmentation; NP-hard problems; exact algorithms; partial reconfiguration; reconfigurable computing;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2008.2000677
Filename :
4579741
Link To Document :
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