DocumentCode :
818576
Title :
A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem
Author :
Shieh, Ming-Der ; Chen, Jun-Hong ; Wu, Hao-Hsuan ; Lin, Wen-Ching
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
Volume :
16
Issue :
9
fYear :
2008
Firstpage :
1151
Lastpage :
1161
Abstract :
Modular exponentiation with a large modulus, which is usually accomplished by repeated modular multiplications, has been widely used in public key cryptosystems for secured data communications. To speed up the computation, the Montgomery modular multiplication algorithm is used to relax the process of quotient determination, and the carry-save addition (CSA) is employed to reduce the critical path delay. In this paper, based on the inherent data dependency between the modular multiplication and square operations in the H-algorithm of modular exponentiation, we present a new modular exponentiation architecture with a unified modular multiplication/square module and show how to reduce the number of input operands for the CSA tree by mathematical manipulation. The developed architecture has the following advantages. 1) There is no need to convert the carry-save form of an operand into its binary representation at the end of each modular multiplication. In this way, except the final step to get the result of modular exponentiation, the time-consuming carry propagation can then be eliminated. 2) The number of input operands for the CSA tree is reduced in a very efficient way. 3) The hardware saving is achieved with very limited impact on the original critical path delay when designed with two distinct modular multiplication and square components. Experimental results show that our modular exponentiation design obtains the least hardware complexity compared with the existing work and outperforms them in terms of area-time (AT) complexity as well.
Keywords :
cryptography; telecommunication security; CSA tree; H-algorithm; Montgomery modular multiplication algorithm; RSA cryptosystem; carry-save addition; critical path delay; modular exponentiation architecture; public key cryptosystems; quotient determination; secured data communications; Carry-save addition (CSA); Montgomery modular multiplication; RSA cryptosystem; VLSI architecture; modular exponentiation;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2008.2000524
Filename :
4579747
Link To Document :
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