DocumentCode
81859
Title
Comparative Performance Analysis of High Density and Efficiency PFC Topologies
Author
Yun-Sung Kim ; Won-Yong Sung ; Byoung-Kuk Lee
Author_Institution
Coll. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea
Volume
29
Issue
6
fYear
2014
fDate
Jun-14
Firstpage
2666
Lastpage
2679
Abstract
In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.
Keywords
PWM power convertors; electric current control; power factor correction; PFC topology; back-to-back bridgeless boost PFC; circuit selection; comparative performance analysis; current mode control; high-performance converter; power 2 kW; power factor correction; power factor improvement circuit; semibridgeless boost PFC; Electromagnetic interference; Field effect transistors; Inductors; Performance evaluation; Pulse width modulation; Reactive power; Topology; Average current mode control; back-to-back bridgeless; boost; interleaved; power factor correction (PFC); semi-bridgeless;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2013.2275739
Filename
6578557
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