Title :
Arsenic ion implant energy effects on CMOS gate oxide hardness
Author :
Draper, Bruce L. ; Shaneyfelt, M.R. ; Young, Ralph W. ; Headley, T.J. ; Dondero, Rich
Author_Institution :
Sandia Nat. Labs., Albuquerque, NM, USA
Abstract :
Under conditions that were predicted as "safe" by well-established TCAD packages, radiation hardness can still be significantly degraded by a few lucky arsenic ions reaching the gate oxide during self-aligned CMOS source/drain ion implantation. The most likely explanation is that both oxide traps and interface traps are created when ions penetrate and damage the gate oxide after channeling or traveling along polysilicon grain boundaries during the implantation process.
Keywords :
CMOS integrated circuits; arsenic; elemental semiconductors; grain boundaries; ion implantation; radiation hardening (electronics); silicon; technology CAD (electronics); CMOS gate oxide hardness; Si:As; TCAD packages; arsenic ion implant energy effects; interface traps; polysilicon grain boundaries; radiation hardness; self-aligned CMOS source-drain ion implantation; CMOS process; CMOS technology; Computational modeling; Degradation; Implants; Ion implantation; Lead compounds; MOSFETs; Radiation effects; Threshold voltage; Integrated circuit radiation effects; MOSFETs; ion implantation; radiation hardening;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2005.860727
