DocumentCode
818848
Title
A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture
Author
Lang, Tomás ; Nannarelli, Alberto
Author_Institution
Dept. of Electr. Eng. & Comput. Sci. Eng., California Univ., Irvine, CA
Volume
56
Issue
6
fYear
2007
fDate
6/1/2007 12:00:00 AM
Firstpage
727
Lastpage
739
Abstract
In this work, we present a radix-10 division unit that is based on the digit-recurrence algorithm. The previous decimal division designs do not include recent developments in the theory and practice of this type of algorithm, which were developed for radix-2k dividers. In addition to the adaptation of these features, the radix-10 quotient digit is decomposed into a radix-2 digit and a radix-5 digit in such a way that only five and two times the divisor are required in the recurrence. Moreover, the most significant slice of the recurrence, which includes the selection function, is implemented in radix-2, avoiding the additional delay introduced by the radix-10 carry-save additions and allowing the balancing of the paths to reduce the cycle delay. The results of the implementation of the proposed radix-10 division unit show that its latency is close to that of radix-16 division units (comparable dynamic range of significant) and it has a shorter latency than a radix-10 unit based on the Newton-Raphson approximation
Keywords
Newton-Raphson method; approximation theory; floating point arithmetic; Newton-Raphson approximation; digit-recurrence algorithm; floating point arithmetic; radix-10 division unit; radix-2k divider; Added delay; Algorithm design and analysis; Computer Society; Computer architecture; Dynamic range; Floating-point arithmetic; Helium; Informatics; Mathematical model; Poles and towers; Decimal arithmetic; algorithms and architectures for floating-point arithmetic.; decimal division; digit-recurrence division;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2007.1038
Filename
4167785
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