Numerical Function Generators Using LUT Cascades

Author

Sasao, Tsutomu ; Nagayama, Shinobu ; Butler, Jon T.

Author_Institution

Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Fukuoka

Volume

56

Issue

6

fYear

2007

fDate

6/1/2007 12:00:00 AM

Firstpage

826

Lastpage

838

Abstract

This paper proposes an architecture and a synthesis method for high-speed computation of fixed-point numerical functions such as trigonometric, logarithmic, sigmoidal, square root, and combinations of these functions. Our architecture is based on the lookup table (LUT) cascade, which results in a significant reduction in circuit complexity compared to traditional approaches. This is suitable for automatic synthesis and we show a synthesis method that converts a Matlab-like specification into an LUT cascade design. Experimental results show the efficiency of our approach as implemented on a field-programmable gate array (FPGA)

Keywords

fixed point arithmetic; mathematics computing; table lookup; Matlab; field-programmable gate array; lookup table cascade; numerical function generator; Circuit synthesis; Computer architecture; Computer languages; Field programmable gate arrays; Hardware; Iterative algorithms; Polynomials; Signal generators; Signal processing algorithms; Table lookup; FPGA implementation.; LUT cascades; automatic synthesis; nonuniform segmentation; numerical function generators (NFGs);

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.2007.1033

Filename

4167792